With the rate of advancement in semiconductor design having slowed down in recent years, it has lead many to believe that Moore’s Law no longer applies. But the introduction of chiplets may yet bring previous levels of development back to the fore.
Moore’s Law was, of course, never an actual law, nor did its theory always hold true all of the time. But it became somewhat of a marker for the industry that the number of transistors that can be placed on a single silicon chip doubles every two years.
The theory held sway for 50 years, but unfortunately physics and economics caught up with development, and now that rate of advancement has slowed considerably. Increasing costs of manufacturing dies, with ever decreasing manufacturing processes and lower yields has all played into this. So where do chiplets come in?
What is a chiplet?
In short, a chiplet is a way of breaking down a larger chip into smaller, separate ‘chiplets’. The reason for doing this is, primarily, due to cost of manufacturing. By breaking down a larger die into smaller chiplets, both yield and binning rates are improved.
Building a chip from smaller dies is not a new idea. Originally the need to do it was dictated by the reticle limit. This was the maximum size it was possible to build a single chip. When a chip exceeded this limit, it had to be broken up into smaller dies.
Eventually technology development enabled larger, more complicated integrated circuits, and the need to break up the chip design reduced. But now things have come around full circle.
Manufacturing large, one piece dies is becoming more and more uneconomical. Wikichip gives a good example of the differences by showing how a 360mm² monolithic die will have a yield of 15%, while a 4-chiplet design, each 99mm² doubles that yield to 37%.
According to EET Asia much of the growth of chiplets will be driven by chiplets that make up heterogenous processors. In other words, chips can be made that combine different specialised functionality within each chiplet. Processing elements such as integrated graphics, AI acceleration, controllers etc can all be combined onto one single ‘chip’.
The acceleration in the global market for chiplet based design is demonstrated by forecasts which expect it to expand from $452m in 2018 to $2.4bn in 2024. Further, this is expected to reach around $57bn by 2035.
The results of using chiplet based design are clear to see. AMD’s Zen architecture uses chiplets, with the company claiming that manufacturing chips in this way has reduced costs by as much as half.
Indeed the 7nm process would not be feasible without the development of the chiplet strategy. But there are other benefits to the design method beyond that of economics and ease of manufacture. Chiplet design means that manufacturers can combine memory and I/O devices onto a single chip, reducing latency, power consumption, and clock speed.
Whilst chiplets are not expected to revive Moore’s Law on their own, they will be a significant contributor to advancing design strategies, material, and packaging technologies.